Well then perhaps a VHDL introduction into making a serial port with configuration registers, interrupts and baud rates?
You can create boards with very few external components other than physical layer interfaces and perform all your logic in parrallel at high speed The first steps towards making your own ASIC to say… mine bitcoins? or interconnect, mux, latch and count different interfaces together.
You can even get embedded micro processors inside some FPGAs which lets you create whatever type of controller or interface you want…
VHDL is a programming language for it, much like verilog. Altium can take your schematic netlists and use them in your FPGAs, and even pin swap them for optimal placement.
They make excellent latch and line level converters too… ooo you got me excited
I’ve always found it hard to explain to people why they want/need an FPGA/CPLD until THEY know they want/need one. At which time you obviously no longer need to explain to them why.
They already know what eggs are and that they can buy them by the dozen, so they don’t want to go to the effort to build a hen house.
Take your “You can make a UART” example. They already have UARTs in everything. And while making a UART is an excellent tutorial for learning VHDL, it is not an example of “why do I want to learn VHDL”.
Yes it is easy to make a “video card” in an FPGA and it is fun to do if you already understand WHY. To others they say “My RasPi has a Mali400 in it”
I’m not arguing that FPGAs aren’t awesome. They are. I’m saying unless people already know they are awesome it is hard to convince them that they need them.
If they have already worked out they are awesome, then they have already read “FPGA Arcade” or “Nand to Tetris”
Give it a try though. You already have one person (Jace) interested. Fingers crossed more people come out of the woodwork to prove me wrong about it being hard to get people enthusiastic about VHDL.
I can’t get enthusiastic about VHDL. Dear god, that is a crappy language. So is Verilog. It’s the equivalent of having BASIC and COBOL be the current industry standard for application development.
Want to get to grips with SpinalHDL, that looks extremely good.
What got me interested was the talk the creator did at 33c3: https://www.youtube.com/watch?v=dRhmH2eW7w4
It’s essentially a library on top of Scala, a bit like MyHDL is on top of Python.
It’s just another language to throw on the pile; I’m a bit busy playing with Forth to spend any time with Scala right now. MyHDL isn’t quite as nice as SpinalHDL but it’s for Python, which I’m fluent in; I’ll probably start with that to wrap my head around HDL design again, since I’m incredibly rusty atm.